| 摘要 |
<p>A semiconductor memory is provided to perform the selection operation by the address to the driving operation by the power supply voltage(Vcc). A plurality of memory cells(MC) comprises the memory transistor having the selecting transistor and control gate connected to the selecting transistor. A plurality of select gate lines(SGL) is connected to the gate of the selecting transistor. A plurality of control gate lines(CGL) is connected to the control gate of the memory transistor. A plurality of source lines(SL) is connected to the source of the memory transistor. A plurality of bit lines(BL) intersects with the select gate line and is connected to the selecting transistor. The select gate line driver circuit(SGDEC/DR) operates a plurality of select gate lines.</p> |
