发明名称 Multi-processor data coherency
摘要 A method for maintaining coherent data in a multiprocessor system having a plurality of processors coupled to main memory, where each processor has an internal cache which is externally unreadable outside the processor. The method includes requesting data associated with a memory location in main memory and determining if an external cache coupled to an application specific integrated circuit associated with a second processor contains a reference to the requested data. A snoop cycle is performed on the second processor if the external cache has a reference to the requested data, whereupon a determination is made as to whether the requested data has been modified.
申请公布号 US7584330(B2) 申请公布日期 2009.09.01
申请号 US20040886231 申请日期 2004.07.07
申请人 INTERGRAPH HARDWARE TECHNOLOGIES COMPANY 发明人 MCKINNEY ARTHUR C.;MCCARVER, JR. CHARLES H.;SAMIEE VAHID
分类号 G06F12/08;G06F13/40;G06F15/173;H03K19/003;H03K19/0185 主分类号 G06F12/08
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