发明名称 PARALLEL TEST CIRCUIT WITH ACTIVE DEVICES
摘要 <p>In accordance with one embodiment of the invention, a system is provided that comprises a first terminal for receiving an input testing signal during operations; a plurality of input/output terminals coupled with the first terminal; wherein the input/output terminals are configured to parallel output respective output testing signals during parallel output operation; wherein the input/output terminals are configured to parallel input testing response signals during parallel input operation from devices under test; and wherein each of the input/output terminals is electrically isolated during operation from the remaining plurality of input/output terminals.</p>
申请公布号 WO2009105765(A1) 申请公布日期 2009.08.27
申请号 WO2009US34900 申请日期 2009.02.23
申请人 VERIGY (SINGAPORE) PTE. LTD.;DE LA PUENTE, EDMUNDO;ESKELDSON, DAVID 发明人 DE LA PUENTE, EDMUNDO;ESKELDSON, DAVID
分类号 G01R31/02 主分类号 G01R31/02
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