SHIFT REGISTER CIRCUIT, DISPLAY DEVICE, AND METHOD FOR DRIVING SHIFT REGISTER CIRCUIT

摘要

Each of stages connected in cascade comprises a first circuit using TFTs (Tr15, Tr16, Tr17) for connecting predetermined nodes (netA, Gn) of each stage to a lower voltage power supply. A first type of clock signal is transmitted by each stage to an output terminal (Gn) of each stage and thereby outputted to be used for an output signal (OUT). A second type of clock signal is used for driving the first circuit. This provides a shift register circuit capable of further suppressing threshold voltage shift phenomena of the TFTs.