发明名称 |
METHOD OF TRIMMING A HARD MASK LAYER, METHOD FOR FABRICATING A GATE IN A MOS TRANSISTOR, AND A STACK FOR FABRICATING A GATE IN A MOS TRANSISTOR |
摘要 |
A stack structure for forming a gate of a MOS transistor includes a substrate including a plurality of shallow trench isolations therein; a dielectric layer, a conductive layer and a hard mask layer formed on the substrate in sequence; and a tri-layer stack comprising a top photo resist layer, a silicon-containing photo resist layer and a bottom anti-reflective coating (BARC) on the hard mask layer, wherein the silicon-containing photo resist layer comprises 10-30% silicon and the hard mask layer has a high etching selectivity ratio to the conductive layer.
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申请公布号 |
US2009206403(A1) |
申请公布日期 |
2009.08.20 |
申请号 |
US20090430107 |
申请日期 |
2009.04.27 |
申请人 |
WANG MENG-JUN;CHEN YI-HSING;YANG MIN-CHIEH;LIAO JIUNN-HSIUNG |
发明人 |
WANG MENG-JUN;CHEN YI-HSING;YANG MIN-CHIEH;LIAO JIUNN-HSIUNG |
分类号 |
H01L29/06 |
主分类号 |
H01L29/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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