| 摘要 |
A semiconductor memory device is provided to minimize the consumable current regardless of the operation mode by differentiating the transmission path of clock. A semiconductor memory device comprises the first clock transfer path(400A,410A,420A), the second clock transfer path(420B,400B,410B) and a data output unit(440,480). The first clock transfer path outputs the swing domain of the source clock(CML_CLK,CML_CLKb) from the CML domain corresponding to the enable signal to the CMOS domain. The second clock transfer path outputs the source clock of the CMOS domain through the clock transmission line(CLK_LINE,CLK_LINEb) corresponding to the enable signal(ENABLEb). The data output unit outputs the data corresponding to the output clocks of the first and second clock transfer paths.
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