发明名称 METHOD FOR ETCHING SILICON-CONTAINING ANTI-REFLECTIVE COATING (ARC) LAYER WITH REDUCED CRITICAL DIMENSION (CD) BIAS
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method for etching features in a silicon-containing anti-reflective coating (ARC) layer on a substrate, and more particularly, a method for etching features in a silicon-containing (ARC) layer while reducing a critical dimension (CD) bias. <P>SOLUTION: A method for dry development of an anti-reflective coating (ARC) layer on a substrate includes a process of providing a substrate having a multi-layer mask in a plasma processing system. A feature pattern is then formed in a lithographic layer using a lithographic process. Thereafter, the feature pattern is transferred from the lithographic layer to the silicon-containing ARC layer using a dry plasma etching process, wherein the offset in the CD bias is reduced between nested structures and isolated structures. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009188403(A) 申请公布日期 2009.08.20
申请号 JP20090018978 申请日期 2009.01.30
申请人 TOKYO ELECTRON LTD 发明人 KO AKITERU;COLE CHRISTOPHER
分类号 H01L21/3065;H01L21/027 主分类号 H01L21/3065
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