| 摘要 |
PROBLEM TO BE SOLVED: To provide a technique capable of further accurately performing timing convergence in a design stage of a semiconductor integrated circuit. SOLUTION: A power source noise period is determined by dynamic IR drop analysis, and the delay of a delay path is set to a multiple of the noise period. According to this, increase in delay and decrease in delay of the power source noise quantity (delay time×power source noise amplitude) an internal signal of the semiconductor integrated circuit receives when passing through a delay path circuit are substantially equalized to each other. COPYRIGHT: (C)2009,JPO&INPIT
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