发明名称 Flat analog AFE coupled with an all digital architecture compensation read channel
摘要 Reading data from a magnetic storage media with an analog front end (AFE) coupled to an all digital read channel compensation architecture. A read head passes over magnetic storage media to produce an analog signal. The analog signal is amplified such that the range of the amplified analog signal substantial matches a range of the analog to digital converter (ADC) used to sample the analog signal. A baseline adjust is performed on the amplified analog signal to center the amplified analog signal to a midscale of the ADC. The amplified analog signal may be sampled where the sampling is data frequency locked by a data lock clock (DLC) tracking module. A digital signal may then be produced from the amplified analog signal where this signal is read channel compensated in the digital domain to produce a digital signal which is then processed with a sequence detector.
申请公布号 US2009207517(A1) 申请公布日期 2009.08.20
申请号 US20080032137 申请日期 2008.02.15
申请人 BROADCOM CORPORATION 发明人 BLISS WILLIAM GENE
分类号 G11B5/00;G11B21/02 主分类号 G11B5/00
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