| 摘要 |
A data memory system is provided to improve a writing speed by expanding a writing step and a writing threshold value distribution. A nonvolatile memory cell array(1) includes a plurality of memory cell. A memory cell stores digital data of the values of 1 and 0 as the electric charge of the charge accumulation layer. An error correction code generating circuit(102) produces the code for correcting the error data of one bit from the information bit. An error correction code decoding circuit(103) corrects the error from the error correction code and restores the information bit. A code conversion circuit performs the exclusive OR of the plurality of bits and the information bit or error correction code. |
