发明名称 METHOD OF MANUFACTURING COMPOUND SEMICONDUCTOR SUBSTRATE AND COMPOUND SEMICONDUCTOR SUBSTRATE
摘要 <P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a compound semiconductor substrate capable of reducing the amount of warpage in the substrate. <P>SOLUTION: The method of manufacturing the compound semiconductor substrate includes: a lapping process S30 for mechanically machining a compound semiconductor substrate having a main surface and a rear surface on a surface opposite to the main surface by a simultaneous double surface lapping apparatus; and a polishing process S50 for polishing the lapped compound semiconductor substrate. In the lapping process S30, the compound semiconductor substrate is mechanically machined by the simultaneous double surface lapping apparatus so that the amount of lapping in the rear surface becomes larger than that in the main surface. In the polishing process S50, the main surface of the compound semiconductor substrate is subjected to specular polishing. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009182135(A) 申请公布日期 2009.08.13
申请号 JP20080019411 申请日期 2008.01.30
申请人 SUMITOMO ELECTRIC IND LTD 发明人 NAKAYAMA MASAHIRO
分类号 H01L21/304;B24B37/08 主分类号 H01L21/304
代理机构 代理人
主权项
地址