发明名称 Integrated fault output/fault response delay circuit
摘要 A time delay fault device includes an integrated circuit (IC) having an electronic circuit having a fault indicator signal output and a time delay circuit having an input connected to the fault indicator signal output and an output to provide a delayed fault indicator signal output, the time delay circuit being responsive to an external voltage from a resistor capacitor network coupled to the delayed fault indicator signal output to set the time delay of the delayed fault indicator signal.
申请公布号 US7573393(B2) 申请公布日期 2009.08.11
申请号 US20070672739 申请日期 2007.02.08
申请人 ALLEGRO MICROSYSTEMS, INC. 发明人 HAAS DAVID J.;LAMARRE JONATHAN;DOOGUE MICHAEL C.
分类号 G08B21/00;G01R31/14;H02H3/00 主分类号 G08B21/00
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