发明名称 Post last wiring level inductor using patterned plate process
摘要 A semiconductor structure. The semiconductor structure includes: a substrate having a metal wiring level within the substrate; a capping layer on and above the substrate; an insulative layer on and above the capping layer; a first layer of photo-imagable material on and above the insulative layer; a layer of oxide on and above the first layer of photo-imagable material; a second layer of photo-imagable material on and above the layer of oxide; an inductor; and a wire bond pad. A first portion of the inductor is in the second layer of photo-imagable material, the layer of oxide, the first layer of photo-imagable material, the insulative layer, and the capping layer. A second portion of the inductor is in only the second layer of photo-imagable material. The wire bond pad in only the first layer of photo-imagable material, the insulative layer, and the capping layer.
申请公布号 US7573117(B2) 申请公布日期 2009.08.11
申请号 US20080174047 申请日期 2008.07.16
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHINTHAKINDI ANIL KUMAR;COOLBAUGH DOUGLAS DUANE;FLORKEY JOHN EDWARD;GAMBINO JEFFREY PETER;HE ZHONG-XIANG;STAMPER ANTHONY KENDALL;VAED KUNAL
分类号 H01L29/00 主分类号 H01L29/00
代理机构 代理人
主权项
地址