发明名称 METHOD OF DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, DESIGNING APPARATUS, AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 As a method for considering the adverse influence of the stresses caused form the pad, two sorts of methods are provided. As one method, while delay variation values of cells caused by an adverse influence of stresses are calculated, the calculated delay variation values are applied to the cells so as to perform a timing analysis, and the like by considering the adverse influence of the stresses. Then, in order that a flip chip type LSI is designed by employing a result of the above-described analysis in such a manner that the adverse influence of the stresses applied from the pad is not given to vias, wiring lines, and cells located under the pad, such a physical structure that no via is arranged under the pad is employed.
申请公布号 US2009193374(A1) 申请公布日期 2009.07.30
申请号 US20090352206 申请日期 2009.01.12
申请人 FUJIMOTO KAZUHIKO;YOKOYAMA KENJI;FUJINO TAKEYA;OHASHI TAKAKO;FUKAZAWA HIROMASA;TAKAGI YOHEI;FUJITA KAZUHISA 发明人 FUJIMOTO KAZUHIKO;YOKOYAMA KENJI;FUJINO TAKEYA;OHASHI TAKAKO;FUKAZAWA HIROMASA;TAKAGI YOHEI;FUJITA KAZUHISA
分类号 G06F17/50 主分类号 G06F17/50
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