发明名称 SECURE COMPUTING SYSTEM
摘要 <p>A third secure computing device generates data Wb corresponding to the bits b of a fragment t satisfying mA=s*t with respect to a first input value mA and an operator * and data W(1-b) corresponding to the inverted bits (1-b) of the bits b, transmits the data Wb to a first secure computing device, and transmits the data Wb and data W including data W(1-b) to a second secure computing device. The second secure computing device creates data T which includes a concealed logical circuit function f(s*X) defined by embedding a fragment s in a logical circuit function f and which enables production of a computation result f(mA) from the data T itself and the data Wb. The created data T is transmitted to the first secure computing device. The first secure computing device computes the computation result f(mA) from the data T and data Wb.</p>
申请公布号 WO2009093603(A1) 申请公布日期 2009.07.30
申请号 WO2009JP50857 申请日期 2009.01.21
申请人 NIPPON TELEGRAPH AND TELEPHONE CORPORATION;CHIDA, KOJI 发明人 CHIDA, KOJI
分类号 G09C1/00 主分类号 G09C1/00
代理机构 代理人
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