发明名称 SYNCHRONIZATION SYSTEM OF CLOCK MECHANISM
摘要 <p><P>PROBLEM TO BE SOLVED: To provide synchronization system of clock mechanism which can synchronize clocks of PC itself and its peripheral device to uniform timestamp type of each error log independently-acquired by PC itself and its peripheral device and then make error analysis easier, by issuing request for clock information to the PC body in initialization processing upon power-on of the peripheral device, solving the problem of conventional technology regarding difference in each timestamp type of time information such as indication in hour/minute/second for the PC itself, while accumulated energizing time for the peripheral device, which makes correlation of each error log more difficult. <P>SOLUTION: By issuing request for clock information to the PC body in initialization processing upon power-on of the peripheral device to acquire the clock information and then initialize the clock information of the peripheral device, both clocks of the PC itself and its peripheral device will be synchronized. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009168764(A) 申请公布日期 2009.07.30
申请号 JP20080009981 申请日期 2008.01.21
申请人 HITACHI LTD 发明人 KANEKO SHIGERU
分类号 G04C9/04;G04G5/00;G04G7/00;G06F1/14;G06F11/34 主分类号 G04C9/04
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