发明名称 MEMORY DEVICE AND DATA READING METHOD
摘要 A memory device is provided. The memory device includes a memory array formed by a plurality of multi level cells, a determining circuit and a data reading circuit. The memory array includes a plurality of page units, each including a main data and an auxiliary data corresponding to the main data, wherein the auxiliary data includes a plurality of flag bits. The determining circuit generates a determination bit according to the flag bits. The data reading circuit obtains information corresponding to the main data according to the determination bit.
申请公布号 US2009177851(A1) 申请公布日期 2009.07.09
申请号 US20080338420 申请日期 2008.12.18
申请人 TU CHUN-YI;TSENG TE-CHANG;ARAKAWA HIDEKI;NAKAYAMA TAKESHI 发明人 TU CHUN-YI;TSENG TE-CHANG;ARAKAWA HIDEKI;NAKAYAMA TAKESHI
分类号 G06F12/00 主分类号 G06F12/00
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