发明名称 Structure and Method for Forming Shielded Gate Trench FET with Multiple Channels
摘要 A field effect transistor (FET) includes a pair of trenches extending into a semiconductor region. Each trench includes a first shield electrode in a lower portion of the trench and a gate electrode in an upper portion of the trench over but insulated from the shield electrode. First and second well regions of a first conductivity type laterally extend in the semiconductor region between the pair of trenches and abut sidewalls of the pair of trenches. The first and second well regions are vertically spaced from one another by a first drift region of a second conductivity type. The gate electrode and the first shield electrode are positioned relative to the first and second well regions such that a channel is formed in each of the first and second well regions when the FET is biased in the on state.
申请公布号 US2009166728(A1) 申请公布日期 2009.07.02
申请号 US20070964283 申请日期 2007.12.26
申请人 PAN JAMES 发明人 PAN JAMES
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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