发明名称 SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR APPLYING MEMORY CELL VOLTAGE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor memory device in which the voltage drop of a memory cell is compensated. <P>SOLUTION: The semiconductor memory device includes a plurality of word lines WL arranged in parallel, a plurality of bit lines BL arranged in parallel so as to intersect with the plurality of word lines, and a memory cell MC disposed on each intersection point of the word lines WL and the bit lines BL, wherein one end thereof is connected to a word line WL and the other end is connected to a bit line BL. Also, the semiconductor memory device includes a drive circuit 3 for selectively adding a voltage for data read/write to between the word line and the bit line, and further, a sense amplifier circuit 21 connected to the plurality of bit lines BL for reading/writing data stored in the memory cell MC. Further, based on information including the data of the memory cell MC read by the sense amplifier circuit 21, the semiconductor memory device includes an auxiliary bit line drive circuit 22 for adjusting the potential of at least one bit line BL among the plurality of bit lines BL. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009140593(A) 申请公布日期 2009.06.25
申请号 JP20070317992 申请日期 2007.12.10
申请人 TOSHIBA CORP 发明人 INOUE HIROFUMI
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
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