发明名称 Process for Making a Multilayer Circuit Device Having Electrically Isolated Tightly Spaced Electrical Current Carrying Traces
摘要 A process for making a multilayer circuit device having electrically isolated tightly spaced electrical current carrying traces, comprising of providing an insulative substrate having a first side coated with a layer of conductive metal intended to form a ground plane; providing a plurality of seed layer traces of a predetermined width of approximately 25 microns or less separated from each other by a predetermined distance of approximately 25 microns or less on a second side of the insulative substrate, the narrowness of such separation being essentially limited only by characteristics of the photoresist material to be deposited and developed therebetween and to withstand subsequent processing; developing ribs or barriers of photoresist forming vertical walls rising above the spaces separating the seed layer traces and defining valleys or channels thereover; depositing a desired thickness of conductive material over the seed layer traces and in the valleys or channels between the vertical walls; stripping away the resist ribs or barriers to leave conductive traces to be variously used as ground lines, signal lines and power lines; repeating the previous steps to develop a plurality of circuit boards; stacking the several circuit boards and joining them together with layers of insulative material; identifying particular ones of the traces as signal lines and other traces as power lines and/or ground lines; interconnecting at least some of the ground lines on one board to ground lines and/or ground planes on other boards by conductors extending through vias; interconnecting signal lines to signal input and output terminals; and perhaps to signal lines on other boards through vias; and interconnecting power lines to power input and output terminals, and perhaps to power lines on other boards through vias.
申请公布号 US2009158581(A1) 申请公布日期 2009.06.25
申请号 US20080263416 申请日期 2008.10.31
申请人 VERTICALTEST, INC. 发明人 NGUYEN VINH T.;HAMRICK CLAUDE A.S.
分类号 H05K3/10;H01S4/00 主分类号 H05K3/10
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