发明名称 METHOD FOR FORMING LANDING PLUG CONTACT IN SEMICONDUCTOR DEVICE
摘要 A method for forming a landing plug contact of a semiconductor device is provided to prevent a short between a gate electrode and a landing plug and to prevent a SAC(Self Aligned Contact) defect caused by the short between the gate electrode and the landing plug. An isolation layer(21) is formed on an upper surface of a semiconductor substrate in order to define an active area. A gate pattern having a stacked structure of a gate insulating layer, a gate electrode(22), and a gate hard mask(23) is formed on the upper surface of the semiconductor substrate. A first nitride layer is formed on an entire surface of the resultant including the gate pattern. A landing plug contact region is opened by etching at least the first nitride layer in a dry etch manner in order to expose the isolation layer. A second nitride layer is formed on the entire surface of the resultant. An interlayer dielectric is formed on the second nitride layer. An opening for exposing the second nitride layer is formed by performing an SAC etch process for the interlayer dielectric using a landing plug contact mask. The second nitride layer is removed from a bottom surface of the opening.
申请公布号 KR20090067597(A) 申请公布日期 2009.06.25
申请号 KR20070135303 申请日期 2007.12.21
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, EUN MI;LEE, HAE JUNG;CHOI, IK SOO
分类号 H01L21/28 主分类号 H01L21/28
代理机构 代理人
主权项
地址