| 摘要 |
A system for providing read clock sharing between memory devices. The system includes a memory device having an external clock receiver, a read clock receiver, and a phase comparator. The phase comparator synchronizes an internal read clock generated at the memory device. The phase comparator additionally synchronizes one of an external clock received by the external clock receiver and an external read clock received by the read clock receiver. The results of the synchronizing are utilized to refresh the internal read clock. The memory device also includes a mechanism, a read clock driver and a mode register fit. The mechanism is utilized to select between the external clock and the external read clock as input to the phase comparator. The read clock driver outputs the internal read clock generated at the memory device to a read clock output pin. The mode register bit controls the selection of the mechanism, the enabling and disabling of the read clock receiver and the enabling and disabling of the read clock driver.
|
