发明名称 VERTICAL TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
摘要 <p>A vertical type transistor and a manufacturing method thereof are provided to improve threshold voltage characteristics and operational characteristics by forming uniformly doping density of impurities due to a thermal process for silicon epitaxial layer. A vertical transistor includes a pillar structure(P) and a silicon epitaxial layer(108). The pillar structure includes a first junction part(D), a second junction part(S), and a channel part(C). The channel part is inserted between the first junction part and the second junction part. The channel part includes a p-type impurity having uniform density. The silicon epitaxial layer is formed to cover the channel part. The silicon epitaxial layer includes the p-type impurity having the high density in order to form the p-type impurity having the uniform density in the channel part.</p>
申请公布号 KR20090066488(A) 申请公布日期 2009.06.24
申请号 KR20070134044 申请日期 2007.12.20
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KANG, MYUNG HEE
分类号 H01L29/78 主分类号 H01L29/78
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