发明名称 MEMORY SYSTEM AND CONTROL METHOD FOR MEMORY
摘要 A system unit and an operation method of the system unit are provided, which minimally adjust the power consumed according to the access of the semiconductor memory. A semiconductor memory has the internal circuit and memory input-output circuit. The first control block accesses the semiconductor memory by being connected to the memory input-output circuit. The first control block has the control input-output circuit. The voltage generation part changes the round voltage according to the voltage calibration signal. The clock generating part changes the frequency of the clock signal according to the clock adjustment signal. The second control block optimizes the power consumption of the semiconductor memory.
申请公布号 KR20090065432(A) 申请公布日期 2009.06.22
申请号 KR20080110406 申请日期 2008.11.07
申请人 FUJITSU MICROELECTRONICS LIMITED 发明人 FUJIOKA SHINYA;EGUCHI YASUYUKI
分类号 G11C7/00;G11C5/14 主分类号 G11C7/00
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