发明名称 Dummy via for reducing proximity effect and method of using the same
摘要 A dummy via design for a dual damascene structure has a dielectric layer on a substrate, a dual damascene structure filled with a conductive material and inlaid in the dielectric layer, and a dummy via structure filled with a non-conductive material and inlaid in the dielectric layer. The dummy via structure has at least two dummy vias filled with the non-conductive material and located adjacent to two sides of the dual damascene structure respectively.
申请公布号 US7545045(B2) 申请公布日期 2009.06.09
申请号 US20050087863 申请日期 2005.03.24
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 HUANG KUN-CHENG;TSENG HUAN-CHI;YOU JHY-CHEN;LIU KUAN-MIAO;CHEN TSONG-YUAN;WANG CHIH-YANG;TSAI TIN-LIN;HUANG SSU-CHIA
分类号 H01L29/40 主分类号 H01L29/40
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