发明名称 Resistive Memory Element
摘要 An integrated circuit including a resistive memory element is described. The resistive memory element includes a first solid electrolyte layer including a metal doped glass material, the glass material being at least partially amorphous, and a second solid electrolyte layer including the metal doped glass material. The resistive memory element also includes a middle layer disposed between the first and second solid electrolyte layers, the middle layer including a carbide composition.
申请公布号 US2009140232(A1) 申请公布日期 2009.06.04
申请号 US20070948724 申请日期 2007.11.30
申请人 UFERT KLAUS-DIETER 发明人 UFERT KLAUS-DIETER
分类号 H01L45/00 主分类号 H01L45/00
代理机构 代理人
主权项
地址