| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce noise included in both the voltage levels of signals entering a transmission path. <P>SOLUTION: A noise reduction circuit includes: a delay unit 14 delaying an input signal; an AND unit 10 for calculating the AND of the input signal and the output signal of the delay unit; an OR unit 12 for calculating the OR of the input signal and the output signal of the delay unit; and a selection unit SEL for selecting and outputting one of a first output signal output from the AND unit and a second one output from the OR unit. The selection unit outputs the first and second output signals, when the output signals of the selection unit are first and second voltage levels, respectively. In the delay unit, a plurality of delay circuits DL10_1 to DL10_N are cascade-connected, and taps Tp1 to Tp (N-1) among respective delay circuits are connected to the input terminals of the AND and OR units each. <P>COPYRIGHT: (C)2009,JPO&INPIT |
