| 摘要 |
The present invention relates to a display that uses a polysilicon liquid crystal panel. An object of the present invention is to sufficiently secure a hold period and a setup period upon a rise of a source start pulse signal (SSP) without increasing power consumption or increasing circuit scale. A display control circuit (200) includes a source start pulse signal generating circuit (2311) that generates a source start pulse signal (SSP); and a source shift clock signal generating circuit (2313) that generates a source shift clock signal (SCK). The source shift clock signal generating circuit (2313) shortens a period during which the source shift clock signal (SCK) is maintained at a high level, only during a period of time which is immediately before the source start pulse signal (SSP) rises in each horizontal scanning period, based on a source shift clock modification command signal (K) to be outputted from the source start pulse signal generating circuit (2311).
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