发明名称 ARCHITECTURE FOR VBUS PULSING IN UDSM PROCESSES
摘要 Architecture for VBUS pulsing in an Ultra Deep Sub Micron (UDSM) process for ensuring USB-OTG (On The Go) session request protocol, the architecture being of the type wherein at least a charging circuit is deployed, uses a diode-means connected in a forward path of the charging circuit. The architecture might include a diode-divider including nodes and connected from VBUS in said charging circuit. One embodiment uses both charging and discharging circuits comprising transistors. The charging circuit transistor might comprise a PMOS transistor and the discharging circuit transistor might comprise a NMOS transistor. The architecture might include a three resistance string of a total resistance value approximating 100K Ohms connected between said VBUS and ground, wherein the discharging circuit transistor might comprise a drain extended NMOS transistor. The charging and discharging circuit transistors have VDS and VGD of about 3.6V, whereby high VGS transistors are not needed.
申请公布号 US2009140772(A1) 申请公布日期 2009.06.04
申请号 US20070946876 申请日期 2007.11.29
申请人 SETH SUMANTRA;SREENATH SOMASUNDER KATTEPURA;CHAKRAVARTY SUJOY;ARAKALI ABHIJITH 发明人 SETH SUMANTRA;SREENATH SOMASUNDER KATTEPURA;CHAKRAVARTY SUJOY;ARAKALI ABHIJITH
分类号 H03K19/0175 主分类号 H03K19/0175
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