发明名称 AUTOMATED OPTIMIZATION OF DEVICE STRUCTURE DURING CIRCUIT DESIGN STAGE
摘要 A method of improving a circuit design for a very large scale integrated circuit is provided which represents a plurality of semiconductor devices interconnected in a circuit. It is determined whether an edge of a feature of one of the plurality of semiconductor devices in the design can be moved in a first direction by a distance within a permitted range, such that a performance goal and a matching goal for the circuit are served. If so, the edge is moved in the first direction by the distance calculated to best serve the performance goal and the matching goal. The foregoing steps may be repeated for each of the plurality of semiconductor devices. If necessary, the foregoing steps may be repeated until the performance goal and matching goal for the circuit are deemed to be adequately served.
申请公布号 US2009144670(A1) 申请公布日期 2009.06.04
申请号 US20070946937 申请日期 2007.11.29
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHIDAMBARRAO DURESETI;HIBBELER JASON;WILLIAMS RICHARD Q.
分类号 G06F17/50 主分类号 G06F17/50
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