| 摘要 |
In an overcurrent protection circuit 23 according to the present invention, a timer circuit TMR that generates an overcurrent protection signal EN according to the results of comparison between a detection voltage Va (Vb) and VrefL and VrefH is configured as follows. When Va (Vb) has reached VrefL, the timer circuit TMR starts to count T1. When T1 has elapsed with Va (Vb) kept above VrefL, the timer circuit TMR changes EN to a disabled state and starts to count T2. When T2 has elapsed, the timer circuit TMR returns EN to an enabled state. On the other hand, after Va (Vb) has reached VrefL and T1 starts to be counted, when Va (Vb) has reached VrefH, the timer circuit TMR forcibly stops the counting of T1 without waiting for T1 to elapse, changes EN to a disabled state, and starts to count T2. With this configuration, it is possible to offer necessary and sufficient protection for an object to be protected (for example, a load or an element provided inside a device).
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