发明名称 |
VARIABLE DELAY CIRCUIT, MEMORY CONTROL CIRCUIT, DELAY AMOUNT SETTING APPARATUS, DELAY AMOUNT SETTING METHOD AND COMPUTER READABLE RECORDING MEDIUM RECORDING DELAY AMOUNT SETTING PROGRAM |
摘要 |
<p>A variable delay circuit (100) able to change a delay amount from when a signal (IN) is inputted to when the signal is outputted has a first delay section (101) delaying the signal (IN) by a first delay amount, a second delay section (102) delaying the signal (IN) by a second delay amount greater than the first delay amount, and a delay amount selector (103) selecting a signal route where the delay amount is a sum of the first delay amount and the second delay amount when the delay amount exceeds a maximum delay amount available from the first delay amount section (101). The delay amount from when a signal is inputted to when the signal is outputted can be set in a wide range, while suppressing the circuit scale.</p> |
申请公布号 |
KR20090052268(A) |
申请公布日期 |
2009.05.25 |
申请号 |
KR20080092358 |
申请日期 |
2008.09.19 |
申请人 |
FUJITSU LIMITED |
发明人 |
YAMAZAKI MANABU |
分类号 |
G11C11/407;G06F12/00;G11C11/401;G11C11/4093;G11C11/4096;H03K5/135 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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