| 摘要 |
A thin film transistor array panel includes an insulation substrate having a display area and a peripheral area, a gate line formed on the insulation substrate, a first capacitor conductor made of the same material as the gate line and formed in the peripheral area of the insulation substrate, a gate insulating layer formed on the gate line and the first capacitor conductor, a semiconductor layer formed on the gate insulating layer, a data line and a drain electrode formed on the semiconductor layer and formed in the display area of the insulation substrate, a second capacitor conductor formed of the same material as the data line and formed in the peripheral area of the insulation substrate, and a pixel electrode connected to the drain electrode. The first capacitor conductor and the second capacitor conductor overlap each other. Since the driving capacitor that has been formed on the FPC substrate in the prior art is formed in a peripheral area of the thin film transistor array panel, the FPC can be formed as one layer and a size of the FPC can be substantially reduced and thereby a slim and small-sized liquid crystal display can be produced.
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