发明名称 INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME
摘要 <p>An opening (2) is formed in a protective film (1) arranged on a metal wiring (105) such as a power source wiring or a GND wiring which is required to have a low impedance, and a plated wiring (3) having a large film thickness is formed on the metal wiring (105) through the opening (2). Consequently, the wiring can have a lower impedance due to the increase in the thickness of the wiring, and a fine wiring can be formed at the same time.</p>
申请公布号 WO2009060726(A1) 申请公布日期 2009.05.14
申请号 WO2008JP69237 申请日期 2008.10.23
申请人 SHARP KABUSHIKI KAISHA;KATSUTANI, MASAFUMI;FUJINO, HIROAKI 发明人 KATSUTANI, MASAFUMI;FUJINO, HIROAKI
分类号 H01L21/3205;H01L21/60;H01L23/52 主分类号 H01L21/3205
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