Trace and debug method and system for a processor

摘要

A trace and debug method and system for a processor. The method includes the steps: (A) monitoring a program counter (PC); (B) determining if a processor core executes non-successive instruction in accordance with an address data of the program counter; (C) producing a trace break event in order to set the processor core to enter a debug mode if the processor core executes a non-successive instruction; (D) fetching a value of the program counter and a state of the processor core; and (E) sending the value and the state to a host to accordingly form a trace and debug message with respect to the processor core.