| 摘要 |
This invention relates to a transparent and non-intrusive method for monitoring and managing the running of tasks executed in one or more computer processors, in particular in multi-processor systems with a parallel architecture. It proposes a system and method for managing a computer task, termed target, during a given execution period, termed activity period (SchJ, SchR), within a computer system, in a computer processor provided with means of monitoring or estimating performance and including a counter (PMC) with a given possible error in plus or minus, termed relative error, this process comprising on the one hand, an evaluation of a number of executed instructions (NR, NJ) up to at least one given point of said activity period, using said counter; and on the other hand, a generation of data, termed signature (SGJ, SGR), read or calculated from the state of the processor or computer system and corresponding to at least one given point of said activity period.
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