发明名称 Circuit arrangement for startup current limitation for electronic modules connected to a module carrier
摘要 A circuit arrangement for the time-delayed startup of electronic modules (20) connected to a module carrier (1) comprises a comparator (28) provided with a reference voltage applied thereto and an operating voltage which is applied via charging capacitors (35 to 38) with different capacitances. The terminals (4c-f to 19c-f) for the charging capacitors are integrated in different combinations into the terminals (4a,b to 19a,b) on the module carrier for the operating voltage. The startup time-delay is determined on the basis of the different time intervals resulting from the different values of the capacitances and lasting until a voltage exceeding the reference voltage is achieved, whereupon the respective electronic module is connected to the voltage source by means of the comparator in a time-delayed manner. (FIG.)
申请公布号 US7528506(B2) 申请公布日期 2009.05.05
申请号 US20040575493 申请日期 2004.09.08
申请人 MSA AUER GMBH 发明人 LEMKE ANDREAS
分类号 H02M3/06;H02H9/00 主分类号 H02M3/06
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