发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which the depth of an element isolation region is adjusted for each of different element formation regions such as a contact region, selective gate region, and memory cell region, for easy embedding of an insulating film for each element isolation region, resulting in improved reliability in electrical characteristics of element isolation regions. SOLUTION: The semiconductor memory device includes a semiconductor substrate having a contact region, selective gate region, and memory cell region, a first element isolation region which has a first width and a first depth and is provided in the contact region, a second element isolation region which has a second width and a second depth and is provided in the selective gate region, and a third element isolation region which has a third width and a third depth being shallower than the first depth and the second depth in the memory cell region. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009094313(A) 申请公布日期 2009.04.30
申请号 JP20070263985 申请日期 2007.10.10
申请人 TOSHIBA CORP 发明人 AOKI NOBUTOSHI;IZUMIDA TAKASHI;KONDO MASAKI;ARAI FUMITAKA
分类号 H01L21/8247;H01L21/76;H01L21/762;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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