发明名称 Testing address lines of a memory controller
摘要 All the address lines in a data processing system can be tested by using one or more small memory device that do not occupy the full addressing capability of the address lines. In one embodiment, some of the address inputs of the memory device is connected to different address lines at different times. Instructions are pre-loaded into some locations of the memory device such that the address lines has to be asserted to fetch the instructions for execution. By executing the instructions and appropriately connecting the address lines to the address input, all the address lines can be tested. In another embodiment, some of the locations are pre-loaded with a set of predetermined values. A program then writes another set of predetermined values to associated locations. By reading the values in the locations and compared with the sets of predetermined values, it is possible to determine if the address lines are functioning properly.
申请公布号 US7526689(B1) 申请公布日期 2009.04.28
申请号 US20060478207 申请日期 2006.06.29
申请人 XILINX, INC. 发明人 YIN ROBERT
分类号 G11C29/00 主分类号 G11C29/00
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