发明名称 Chip stack package
摘要 <p>PURPOSE: A chip stack package is provided to easily fabricate and to prevent molding defect and warpage of a bonding wire by using a substrate with a window for exposing a groove and a bonding pad. CONSTITUTION: The first substrate(10) is provided with the window(14) for exposing the first groove(12). The first semiconductor chip of center pad type is attached to expose a bonding pad through the first window. The second substrate(20) with the second widow(24) for exposing the second groove(22) is attached on the first substrate to expose edge portions of the first substrate. The second semiconductor chip is attached in the second groove of the second substrate. A plurality of bonding wires(30,32) are connected between the first electrode terminals(16a,16b) of the first substrate and the second electrode terminals(26a,26b) of the second substrate. Solder balls(40) are attached at a back side of the first substrate.</p>
申请公布号 KR100891538(B1) 申请公布日期 2009.04.06
申请号 KR20030019996 申请日期 2003.03.31
申请人 发明人
分类号 H01L23/12;(IPC1-7):H01L23/12 主分类号 H01L23/12
代理机构 代理人
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