摘要 |
<P>PROBLEM TO BE SOLVED: To suppress the variance of pulse transient occurring in a buffer final stage part connected to a scan pulse line of an image display device. <P>SOLUTION: The display device includes a write scan circuit 12ab. A power source Pvcc generates a voltage Vccv changing synchronously with a clock signal being a reference of write scan pulse generation. A transistor Tr1 controls the magnitude of a flowing current to control the waveform of a write scan pulse. In this case, a threshold voltage between a gate and a source of the transistor Tr1, which is held in a binding capacity C, is fed back to the gate of the transistor Tr1 to correct the variance of the threshold voltage of the transistor Tr1, and the write scan pulse wherein the variance of pulse transient is corrected is generated. <P>COPYRIGHT: (C)2009,JPO&INPIT |