发明名称 FABRICATION OF AN EEPROM CELL WITH EMITTER-POLYSILICON SOURCE/DRAIN REGIONS
摘要 An EEPROM memory cell uses an emitter polysilicon film for fabricating shallow source/drain regions to increase a breakdown voltage of the wells. The wells are fabricated to be approximately 100 nm (0.1 micrometers (mum)) in depth with a breakdown voltage of approximately 14 volts or more. A typical breakdown voltage of a well in a bipolar process is approximately 10 volts. Due to the increased breakdown voltage achieved, EEPROM memory cells can be produced along with bipolar devices on a single integrated circuit chip and fabricated on a common semiconductor fabrication line.
申请公布号 EP1779424(A4) 申请公布日期 2009.03.25
申请号 EP20050762571 申请日期 2005.06.20
申请人 ATMEL CORPORATION 发明人 CHAUDHRY, MUHAMMAD, I.
分类号 H01L21/8238;H01L21/8234;H01L21/8239;H01L21/8247;H01L21/8249;H01L27/06;H01L27/105;H01L27/115 主分类号 H01L21/8238
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