发明名称 Video signal processor circuit and television receiver
摘要 A digital Y signal compatible with a plurality of pixels in one frame unit is divided into a plurality of signal level regions for each constant signal level range by means of a histogram generator circuit, a rate of pixels included in each signal level to all the pixels is detected, and a histogram is generated. In addition, a correction coefficient is set, and the correction coefficient is stored in a correction coefficient storage circuit. In a computing circuit, a correction value relevant to a signal level in each signal level region is calculated in accordance with the histogram and correction coefficient, and input and output characteristics of the digital Y signal are adjusted on the basis of the calculated correction value. The digital Y signal is gamma-corrected by a Y-gammacorrecting circuit in accordance with the input and output characteristics adjusted by the computing circuit.
申请公布号 US7508457(B2) 申请公布日期 2009.03.24
申请号 US20050237858 申请日期 2005.09.29
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 YAMAGISHI KUNIO;SAKAGUCHI TAKASHI
分类号 H04N5/14;H04N5/202;H04N5/52 主分类号 H04N5/14
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