摘要 |
A method for estimating jitter of an integrated circuit design is described. A description of logic blocks of the integrated circuit design is obtained. A description of input/output blocks of the integrated circuit design is obtained. A first type of a first jitter induced by operation of a logic block onto one or more first clock signals external to the logic block is determined. A second type of a second jitter induced by operation of an input/output block on one or more second clock signals external to the input/output block is determined.
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