发明名称 Method and system using hardware assistance for continuance of trap mode during or after interruption sequences
摘要 A method, system, apparatus, and computer program product is presented for processing instructions. A processor is able to receive multiple types of interruptions while executing instructions, such as aborts, faults, interrupts, and traps. A set of processor fields are used to indicate whether or not one or more trap modes are active, such as a single-step trap mode or a taken-branch trap mode. The activity of a trap mode is conditioned, i.e., restricted, modified, or qualified, with a trap mode conditioning field that indicates whether or not the trap mode should remain active during interruption processing. The use of a trap mode conditioning field allows an interruption handler to run at full speed without being interrupted by the trap mode, yet the trap mode is preserved so that other processing, such as instruction tracing, may continue after interruption processing.
申请公布号 US7506207(B2) 申请公布日期 2009.03.17
申请号 US20070942432 申请日期 2007.11.19
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 DEWITT, JR. JIMMIE EARL;HUSSAIN RIAZ Y.;LEVINE FRANK ELIOT
分类号 G06F11/00;G06F11/34;G06F11/36 主分类号 G06F11/00
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