<p>Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus. At least one divider unit may be interposed between the memory bus and the at least two memory units that is configured to approximately equally divide levels of received signals while matching an impedance of the memory bus to an impedance of the memory units.</p>
申请公布号
WO2009032152(A1)
申请公布日期
2009.03.12
申请号
WO2008US10187
申请日期
2008.08.28
申请人
MICRON TECHNOLOGY, INC.;GREEFF, ROY, E.;OVARD, DAVID, K.