发明名称 SEMICONDUCTOR PACKAGING METHOD BY USING LARGE PANEL SIZE
摘要 <p>Semiconductor Packaging Method by Using Large Panel Size The present invention discloses a semiconductor packaging method, comprises steps of back lapping a processed silicon wafer to a desired thickness. Then, the dice are separated from the processed and lapped wafer into a single die. Then, the dice are picked and placed on a tool, an active surface of the dice is attached on the tool. A molding is performed to mold the dice by molding material. The tool is then removed from the dice to form a small unit. The next step is to arrange a plurality of the small units on a carrier in a matrix from. Then, a build-up layer, a re-distribution layer are formed over the dice, followed by forming solder balls on the dice. Finally, the carrier is removed.</p>
申请公布号 SG149743(A1) 申请公布日期 2009.02.27
申请号 SG20070183924 申请日期 2007.12.06
申请人 ADVANCED CHIP ENGINEERING TECHNOLOGY INC. 发明人 YANG WEN-KUN;LIN CHIH-WEI;YU CHUN-HUI
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