发明名称 CLOCK SWITCHING CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To switch a clock without affecting an operation of a processor. <P>SOLUTION: A clock switching circuit includes: a clock generating circuit for generating a plurality of clock signals; a clock selection circuit for outputting one of the plurality of clock signals as an output clock signal; a phase signal output circuit for outputting a phase signal indicating a phase relationship of the plurality of clock signals; a timing signal output circuit for outputting a timing signal indicating a switchable timing from the output clock signal to a switching clock signal based on an output signal indicating the output clock signal and a switching signal indicating the switching clock signal; and a selection signal output circuit for outputting a selection signal which switches the output clock signal into the switching clock signal based on the phase signal and the timing signal at the switchable timing from the output clock signal to the switching clock signal. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009044433(A) 申请公布日期 2009.02.26
申请号 JP20070206928 申请日期 2007.08.08
申请人 SANYO ELECTRIC CO LTD;SANYO SEMICONDUCTOR CO LTD 发明人 KURODA TAKASHI
分类号 H03K5/00;G06F1/06 主分类号 H03K5/00
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