发明名称 SEMICONDUCTOR PACKAGE HAVING MEMORY DEVICES STACKED ON LOGIC CHIP
摘要 A semiconductor package including memory devices laminated in a logic chip is provided to obtain a high speed input and output characteristic by connecting the memory devices to a serializer/deserializer in parallel. A semiconductor package includes a base substrate(50), a logic chip(60), a first semiconductor chip(110) and a second semiconductor chip(220'). The logic chip is arranged on the base substrate. A first surface(21) and a second surface(22) of the logic chip face each other. The logic chip includes a plurality of first signal terminals(65), a plurality of second signal terminals(67) and a serializer/deserializer(69). A serializer/deserializer is electrically connected to the first and second signal terminals. The first semiconductor chip is adhered to the first surface. The first semiconductor chip is electrically connected to the first signal terminals. The second semiconductor chip is adhered to the second surface. The second semiconductor chip is electrically connected to the second signal terminals. The logic chip includes a substrate region(61) and a circuit region(62). The first surface is positioned in a circuit region. The second surface is positioned in the substrate region. The first signal terminals are arranged in the circuit region. The second signal terminals are arranged in the circuit region.
申请公布号 KR20090019297(A) 申请公布日期 2009.02.25
申请号 KR20070083607 申请日期 2007.08.20
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KANG, UK SONG
分类号 H01L23/12 主分类号 H01L23/12
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