| 摘要 |
An interconnect capacitance estimation system includes a first storage device, a library creating device and an interconnect capacitance estimating device. The first storage device stores layout data. The library creating device creates a library used for estimating a capacitance of a net in a semiconductor circuit based on the layout data. The interconnect capacitance estimating device estimates a capacitance of a target net in a target semiconductor circuit based on design data and the library. The library creating device calculates a logic cone size of a logic cone which is a combined circuit composing a signal path through which a signal from an input stage passes to an output stage, creates the library which relates a capacitance, the logic cone size and a fan-out. The interconnect capacitance estimating device calculates a logic cone size of a logic cone of the target net based on the design data, and estimates a capacitance of the target net based on the logic cone size of the target net and the table.
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